View LT8697IUDDTRPBF_9077929.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

lt 8697 1 8697fb for more information www.linear.com/lt8697 typical application features description usb 5v 2.5a output, 42v input synchronous buck with cable drop compensation the lt ? 8697 is a compact, high efficiency, high speed synchronous monolithic step-down switching regulator designed to power 5 v usb applications. a precise output voltage and programmable cable drop compensation main - tain accurate 5 v regulation at the usb socket connected to the end of a long cable. forced continuous operation allows the lt8697 to sink current, further enhancing ac - curate 5v regulation during load transients. accurate and programmable output current limit, a power good indicator pin and an output current monitor pin improve system reliability and safety, allow the user to implement latch-off or auto-retry functionality and can eliminate the need for a usb switch ic. dual feedback al - lows regulation on the output of a usb switch and limits cable drop compensation to a maximum of 5.8 v output, protecting usb devices during fault conditions. thermal shutdown provides additional protection by limiting power dissipation in the ic during an overtemperature fault. the lt8697 is available in a small 24- lead 3 mm 5 mm package with an exposed pad for low thermal resistance. l , lt , lt c , lt m , linear technology, the linear logo and burst mode are registered trademarks of linear technology corporation. all other trademarks are the property of their respective owners . 2mhz 5v step-down converter with cable drop compensation applications n wide input range: 5v to 42v n low dropout under all conditions: 450mv at 2.1a n accurate 5v output: 1.3% over full temperature range n programmable cable drop compensation n programmable output current limit n output current monitor n dual input feedback permits regulation on output of usb switch n forced continuous mode for fast load step response n high efficiency synchronous operation at 2mhz: 93% efficiency at 2.1a, 5v out from 12v in 95% efficiency at 0.9a, 5v out from 12v in n fast minimum switch-on time: 45ns n adjustable output from 5.0v to 5.25v n adjustable and synchronizable: 300khz to 2.2mhz n small thermally enhanced 3mm 5mm 24-lead qfn package n automotive and industrial usb n precision 5v supply transient response through 3 meters awg 20 twisted-pair cable en/uvpg intv cc ictrlsync tr/ss rt sw sys isp isn usb5v rcbl v in v in 6v to 42v bst 3.3h 0.018? gnd lt8697 1f 16.5k pgnd 10nf 4.7f 0.1f 47f 2 18.2k 0.1? 3 meters awg 20 twisted pair cable 0.1? 10k 1nf v out load 8697 ta01a v load 5v, 2.4a +C voltage (v) current (a) 5.00 5.25 5.50 8697 ta01b 4.75 4.50 4.25 3 4 5 2 1 0 100s/div v out v load i load 50ma/s downloaded from: http:///
lt 8697 2 8697fb for more information www.linear.com/lt8697 pin configuration absolute maximum ratings v in , en / uv , pg , isp , isn ........................................... 42 v sys ........................................................................... 30 v usb 5v ..................................................................... 3 ma bst above sw ............................................................ 4v tr / ss , ictrl ..............................................................4v rt, rcbl ..................................................................... 2v sync .......................................................................... 6v operating junction temperature range ( notes 2, 3) lt 8 697 e ............................................ C40 c to 125 c lt 8697 i ............................................. C40 c to 125 c lt 8697 h ............................................ C40 c to 150 c storage temperature range .................. C65 c to 150 c (note 1) 24 23 22 21 9 10 top view 25 gnd udd package 24-lead (3mm 5mm) plastic qfn 11 12 6 5 4 3 2 1 15 16 17 18 19 20 sync tr/ss rt en/uv v in v in pgndpgnd usb5vpg sys intv cc bstsw sw sw ictrlrcbl isn isp ncnc nc nc 14 7 13 8 ja = 46c/w, jc = 5c/w exposed pad (pin 25) is gnd, must be soldered to pcb order information lead free finish tape and reel part marking* package description temperature range lt8697eudd#pbf lt8697eudd#trpbf lggw 24-lead (3mm 5mm) plastic qfn C40c to 125c lt8697iudd#pbf lt8697iudd#trpbf lggw 24-lead (3mm 5mm) plastic qfn C40c to 125c lt8697hudd#pbf lt8697hudd#trpbf lggw 24-lead (3mm 5mm) plastic qfn C40c to 150c consult lt c marketing for parts specified with wider operating temperature ranges . * the temperature grade is identified by a label on the shipping container . for more information on lead free part marking, go to: http://www.linear.com/leadfree/ for more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ parameter conditions min typ max unit v in undervoltage lockout l 2.9 3.4 v v in shutdown current v en/uv = 0.3v l 1 3 8 a a v in current in regulation v in = 12v, i load = 100a, r t = 56.2k l 9 12 ma v in to disable forced continuous mode v in rising l 27 29 31 v output sink current in forced continuous mode v usb5v = 5.5v, l = 6.8h, r t = 56.2k 0.6 1 1.7 a usb5v voltage v in = 12v l 4.96 4.91 4.99 4.99 5.02 5.04 v v usb5v v oltage line regulation v in = 6v to 42v l 6 25 mv regulated load v oltage through 0.3 v in = 12v, i load = 2.1a, voltage at point of load (end of cable), r cbl = 13.7k, r cdc = 10k, r sense = 20m l 4.925 5 5.075 v usb5v clamp voltage i usb5v = 3ma 9 v electrical characteristics the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25c. (notes 2, 4) downloaded from: http:///
lt 8697 3 8697fb for more information www.linear.com/lt8697 electrical characteristics the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25c. (notes 2, 4) parameter conditions min typ max unit usb5v current? v isn = 5v, v isp C v isn = 40mv, r cbl = 13.7k v isn = 5v, v isp C v isn = 10mv, r cbl = 13.7k v isn = 5v, v isp C v isn = 0v, r cbl = 13.7k r cbl = open l l l l 57.5 12 0 0 60 15 2 1 62.5 23 8 2 a a a a current sense v oltage (v isp C v isn ) v ctrl = 1.5v, v isn = 5v v ctrl = 1.5v, v isn = 0v v ctrl = 800mv, v isn = 5v v ctrl = 800mv, v isn = 0v v ctrl = 200mv, v isn = 5v v ctrl = 200mv, v isn = 0v l l l l l l 45 43 34.5 34 4.5 3.5 48 48.5 39.5 40 9.5 10 51 54 44.5 46 14.5 16.5 mv mv mv mv mv mv rcbl monitor v oltage v isp C v isn = 40mv, r cbl = 13.7k v isp C v isn = 10mv, r cbl = 13.7k l l 720 115 800 205 880 305 mv mv rcbl output current limit v isp C v isn = 50mv, v rcbl = 0v C2 C3 C4 ma isp, isn bias current v isp = v isn = 0v, 5v C20 20 a ictrl current v ictrl = 1.5v C0.5 C2 C3 a intv cc voltage v sys = 0v, 5v 3.4 v intv cc undervoltage lockout 2.6 2.9 3.15 v sys voltage in sys regulation v in = 12v l 5.63 5.8 5.92 v sys voltage to disable forced continuous mode 7.5 v sys current in regulation v sys = 5v, r t = 56.2k l 3 4 5 ma dropout voltage (v in C v sys ) v sys = 5v, i load = 2.1a 450 mv maximum duty cycle in dropout 96 97.5 99 % minimum on-time i load = 1a l 30 45 70 ns minimum off-time i load = 0.5a 80 110 ns minimum v in for sys regulation at full frequency r t = 16.5k, v usb5v = 0v, i load = 0.5a 6.2 7 7.9 v oscillator frequency r t = 140k r t = 56.2k r t = 16.5k l l l 250 620 1.85 300 700 2.00 340 750 2.05 khz khz mhz top power nmos on-resistance i sw = 1a 120 m top power nmos current limit e-, i-grades h-grade l l 3.2 2.9 4.8 4.8 6 6 a a bottom power nmos on-resistance v intvcc = 3.4v, i sw = 1a 65 m bottom power nmos current limit v intvcc = 3.4v 3.5 4.5 5.8 a sw leakage current v in = 42v, v sw = 0v, 42v 0.1 5 a en/uv threshold v en/uv rising l 0.94 1.0 1.06 v en/uv hysteresis 40 mv en/uv bias current v en/uv = 2v C20? 20 na pg upper threshold offset from v usb5v v usb5v falling l 6 9 12 % pg lower threshold offset from v usb5v v usb5v rising l C6 C9 C12 % pg hysteresis 1.3 % pg pull-down resistance v pg = 0.1v l 680 2000 pg transition delay v usb5v from 5v to 4v 40 s sync threshold v sync falling v sync rising 0.8 1.6 1.1 2.0 1.4 2.4 v v sync pin current v sync = 2v C1 1 a tr/ss current v tr/ss = 0v C1.2 C2.2 C3.2 a tr/ss pull-down resistance fault condition, v tr/ss = 0.1v 230 downloaded from: http:///
lt 8697 4 8697fb for more information www.linear.com/lt8697 electrical characteristics typical performance characteristics i usb5v vs v sense i usb5v vs frequency v sense vs v ctrl v usb5v vs temperature v usb5v vs v in i usb5v vs temperature note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: the lt8697e is guaranteed to meet performance specifications from 0c to 125c junction temperature. specifications over the C40c to 125c operating junction temperature range are assured by design, characterization, and correlation with statistical process controls. the lt8697i is guaranteed over the full C40c to 125c operating junction temperature range. the lt8697h is guaranteed over the full C40c to 150c operating junction temperature range. high junction temperatures degrade operating lifetimes. operating lifetime is derated at junction temperatures above 125c. note 3: this ic includes overtemperature protection that is intended to protect the device during overload conditions. junction temperature will exceed 150c when overtemperature protection is active. continuous operation above the specified maximum operating junction temperature will reduce lifetime. note 4: polarity specification for current into a pin is positive and out of a pin is negative. all voltages are referenced to gnd unless otherwise specified. max and min refer to absolute values. temperature (c) C55 4.90 v usb5v (v) 4.94 4.984.92 4.96 5.00 5 65 8697 g01 155 C25 35 95 125 v in (v) 6 4.97 v usb5v (v) 4.99 5.014.98 5.00 5.02 14 22 8697 g02 42 10 18 26 34 30 38 temperature (c) C55 0 i usb5v (a) 20 40 6010 30 50 70 5 65 8697 g03 155 125 C25 35 95 v sense = 40mv v sense = 10mv r cbl = 13.7k v sense = 0mv v sense (mv) 0 0 i usb5v (a) 125 175 225100 150 5025 75 200 250 20 40 8697 g04 50 10 30 r cbl = 4.12k r cbl = 13.7k r cbl = 40.2k v ctrl (v) 0 0 v sense (mv) 10 30 5020 40 60 0.4 0.8 8697 g06 1.2 1 0.2 0.6 t a = 25c, unless otherwise noted. frequency (mhz) 0.2 i usb5v (a) 58 60 2.2 8697 g05 5654 0.7 1.2 1.7 6462 v in = 12v r cdc = 10k r cbl = 13.3k i load = 2a r sense = 20m downloaded from: http:///
lt 8697 5 8697fb for more information www.linear.com/lt8697 typical performance characteristics v en vs temperature efficiency vs i load efficiency vs i load temperature (c) C55 0.95 en/uv threshold (v) 0.97 0.99 1.010.96 0.98 1.00 1.02 1.03 5 65 8697 g07 155 125 C25 35 95 en/uv rising en/uv falling load current (a) 0 50 efficiency (%) 70 80 9055 7560 65 85 95 100 1 2 8697 g08 2.5 0.5 1.5 f sw = 2mhz r sense = 18m dcr l = 20m r cbl = open v in = 8v v in = 12v v in = 24v load current (a) 0.001 0 efficiency (%) 40 60 8010 5020 30 70 90 100 0.1 8697 g09 10 00.01 1 f sw = 2mhz r sense = 18m dcr l = 20m r cbl = open v in = 8v v in = 12v v in = 24v t a = 25c, unless otherwise noted. no load supply current vs v in no load supply current vs temperature top fet current limit vs duty cycle top fet current limit vs temperature bottom fet current limit vs temperature input voltage (v) 6 0 input current (ma) 4 8 12 16 2 6 10 14 18 8697 g11 42 12 24 30 36 f sw = 700khz temperature (c) C55 7.0 no load input current (ma) 8.0 9.0 10.0 7.5 8.5 9.5 5 8697 g12 155 125 C25 35 65 95 f sw = 700khz v in = 12v duty cycle (%) 0 2.5 current limit (a) 3.5 4.5 5.03.0 4.0 0.4 8697 g13 1.0 0.2 0.6 0.8 t a = 155c t a = 125c t a = 25c temperature (c) C55 3.0 3.4 current limit (a) 4.2 5.03.8 4.6 5 8697 g14 155 125 C25 35 65 95 30% dc 70% dc temperature (c) C55 3.0 current limit (a) 4.2 5.03.4 3.8 4.6 5 8697 g15 155 C25 35 65 95 125 efficiency vs frequency frequency (mhz) 0.2 60 efficiency (%) 70 80 90 100 1.2 8697 g10 2.2 0.7 1.7 l = 15hr sense = 18m dcr l = 40m r cbl = open i load = 0.9a v in = 8v v in = 12v v in = 24v downloaded from: http:///
lt 8697 6 8697fb for more information www.linear.com/lt8697 typical performance characteristics switch drop vs temperature t a = 25c, unless otherwise noted. dropout voltage vs i load switching frequency vs temperature switching frequency vs i load switching frequency vs v sys switch drop vs i sw minimum on-time vs temperature minimum off-time vs temperature minimum off-time vs temperature temperature (c) C55 0 switch drop (mv) 150 250 50 100 200 5 8697 g16 155 C25 35 65 95 125 top sw bottom sw switch current = 1a switch current (a) 0 0 switch drop (mv) 150 350 50 100 300250 200 1 8697 g17 2.5 0.5 1.5 2 bottom sw top sw load current (a) 0 0 dropout voltage (mv) 600100 200 300 400 500 1 8697 g21 2.5 0.5 1.5 2 dcr l = 20m? r sense = 18m load current (a) 0.0001 1900 switching frequency (khz) 21002050 1950 2000 0.01 8697 g23 10 0.001 0.1 1 r t = 16.5k v sys (v) 0 0 switching frequency (khz) 25002000 1500 500 1000 2 8697 g24 5 1 3 4 r t = 16.5k temperature (c) C55 70 80 100 35 95 8697 g18 6050 C25 5 65 125 155 40 30 90 minimum on-time (ns) i load = 0a i load = 0.9a i load = 2.1a temperature (c) C55 75 minimum off-time (ns) 80 90 95 100 65 120 8697 g19 85 5 C25 95 125 35 155 105 110 115 i load = 0a i load = 0.9a i load = 2.1a r t = 30.1k sync = 3v temperature (c) C55 minimum off-time (ns) 95 35 8697 g20 80 70 C25 5 65 6560 100 9085 75 95 125 155 i load = 0a i load = 0.9a i load = 2.1a r t = 30.1k sync = 1.2mhz temperature (c) C55 1.80 switching frequency (mhz) 1.95 2.201.85 1.90 2.152.05 2.102.00 5 8697 g22 155 C25 35 65 95 125 r t = 16.5k downloaded from: http:///
lt 8697 7 8697fb for more information www.linear.com/lt8697 t a = 25c, unless otherwise noted. typical performance characteristics v usb5v vs v tr/ss i tr/ss vs temperature pg high thresholds v tr/ss (v) 0 0 v usb5v (v) 64 53 1 2 0.4 8697 g25 1.2 0.2 0.6 0.8 1.0 temperature (c) C55 1.4 i tr/ss (a) 1.7 2.21.5 1.6 1.8 1.9 2.0 2.1 5 8697 g26 155 C25 35 65 95 125 v tr/ss = 0.5v temperature (c) C55 6.0 pg threshold offset from v usb5v (%) 7.5 11.0 6.5 7.0 8.0 8.5 9.0 9.5 10.0 10.5 5 8697 g27 155 C25 35 65 95 125 usb5v rising usb5v falling i sys vs v in i sys vs switching frequency v in (v) 5 7 i sys (ma) 8 13 9 10 11 12 15 8697 g29 45 10 20 25 30 35 40 f sw = 2mhz switching frequency (mhz) 0 0 i sys (ma) 2 12 4 6 8 10 0.5 8697 g30 2.5 1 1.5 2 v in = 24v v in = 12v pg low thresholds temperature (c) C55 C13.0 pg threshold offset from v usb5v (%) C11.5 C8.0 C12.5 C12.0 C11.0 C10.5 C10.0 C9.5 C9.0 C8.5 5 8697 g28 155 C25 35 65 95 125 usb5v rising usb5v falling transient response 0a to 1a load step transient response 1a to 2a load step voltage (v) current (a) 5.00 5.25 5.50 8697 g31 4.75 4.50 4.25 3 4 5 2 1 0 100s/div v out v load i load 25ma/s front page application circuit voltage (v) current (a) 5.00 5.25 5.50 8697 g32 4.75 4.50 4.25 3 4 5 2 1 0 100s/div v out v load i load 25ma/s front page application circuit downloaded from: http:///
lt 8697 8 8697fb for more information www.linear.com/lt8697 typical performance characteristics start-up dropout performance start-up dropout performance transient response output current limit transient response usb5v shorted to gnd v in 2v/div v out 2v/div 8697 g36 100ms/div r load = v in v out t a = 25c, unless otherwise noted. voltage (v) current (a) 0 5 10 8697 g33 C5 C10 C15 6 9 12 3 0 C3 100s/div v pg v load i load 50ma/s front page application circuit v out (v) 5.5 6.0 6.5 8697 g34 5.0 4.5 4.0 100s/div usb5v shorted to gnd i load = 0a front page application circut v in 2v/div v out 2v/div 8697 g35 100ms/div r load = 5.6 v in v out downloaded from: http:///
lt 8697 9 8697fb for more information www.linear.com/lt8697 pin functions sync ( pin 1): external clock synchronization input . tie to a clock source for synchronization to an external frequency and forced continuous mode. tie to intv cc if not used. do not float.tr/ss ( pin 2): output tracking and soft-start pin. this pin allows user control of output voltage ramp rate during start-up. a tr/ss voltage below 0.97 v forces the lt8697 to regulate v usb5v to 5 times the tr/ss voltage. when tr/ss is above 0.97 v, the tracking function is disabled and the internal reference resumes control of the error amplifier. an internal 2.2 a pull-up current from intv cc on this pin allows a capacitor to program output voltage slew rate. this pin is pulled to ground when en/uv is low, during thermal shutdown and when v in below its under- voltage lockout threshold; use a series resistor of at least 10k if driving from a low impedance output.rt ( pin 3): tie a resistor between rt and ground to set the switching frequency.en/uv ( pin 4): the lt8697 is shut down when this pin is low and active when this pin is high. the hysteretic threshold voltage is 1.00 v going up and 0.96 v when going down. ti e to v in if the shutdown feature is not used. an external resistor divider from v in can be used to program a v in threshold below which the lt8697 will shut down. v in ( pins 5, 6): the v in pins supply current to the lt8697 internal circuitry and to the internal topside power switch. these pins must be tied together and be locally bypassed. place the positive terminal of the input capacitor as close as possible to the v in pins, and the negative terminal as close as possible to the pgnd pins. pgnd ( pins 7, 8): power switch ground. these pins are the return path of the internal bottom side power switch and must be tied together. place the negative terminal of the input capacitor as close as possible to the pgnd pins. nc ( pins 9-12): no connect. these pins are floating and are not connected to the lt8697. tie these pins to the same copper as the exposed pad. see figure 8.sw ( pins 13, 14, 15): the sw pins are the outputs of the internal power switches. tie these pins together and con - nect them to the inductor and boost capacitor. this node should be kept small on the pcb for good performance. do not drive these pins above v in . bst ( pin 16): this pin is used to provide a drive voltage, higher than the input voltage, to the topside power switch. place a 0.1 f boost capacitor between this pin and sw as close as possible to the lt8697 ic. intv cc ( pin 17): internal 3.4 v regulator bypass pin. the internal power drivers and control circuits are powered from this voltage. the intv cc maximum output current is 20 ma. intv cc current will be supplied from sys if v sys > 3.1 v, otherwise current will be drawn from v in . decouple this pin to power ground with at least a 1 f low esr ceramic capacitor. do not load the intv cc pin with external circuitry. sys ( pin 18): the internal regulator will draw current from sys instead of v in when sys is tied to a voltage higher than 3.3 v. the sys pin must be tied to the side of the inductor opposite the sw pin and must be bypassed by the output capacitor. sys is also the secondary input to the error amp and regulates to a maximum of 5.8v. downloaded from: http:///
lt 8697 10 8697fb for more information www.linear.com/lt8697 pin functions pg ( pin 19): the pg pin is the open-drain output of an internal window comparator. pg remains low until the usb5v pin is within 9% of the final regulation voltage and there are no fault conditions. the pg transition delay is approximately 40 s. pg is valid when v in is above 3.4 v regardless of the en/uv state.usb5v ( pin 20): the lt8697 regulates the usb5v pin to 5v. for cable drop compensation, the usb5v pin input current is proportional to the sensed output current. the usb5v esd cell clamps to 9 v. to allow the lt8697 output to survive a short to 30 v, the 10 k r cdc resistor must be in place between the usb5v pin and the output to limit the current into this pin.isp ( pin 21): current sense (+) pin. this is the non - inverting input to the current sense amplifier.isn ( pin 22): current sense (C) pin. this is the inverting input to the current sense amplifier. rcbl ( pin 23): cable drop compensation program pin. a resistor r cbl tied from rcbl to ground programs cable drop compensation by setting the usb5v input current. rcbl can source 1 ma. excessive capacitive loading on rcbl can degrade load transient response. isolate load capacitance on this pin by tying a 100 k resistor between rcbl and the capacitive load. the rcbl load monitor output is valid when the lt8697 is enabled, otherwise the output is zero. float rcbl if neither the current monitor nor the cable drop compensation feature is desired.ictrl ( pin 24): current adjustment pin. ictrl adjusts the maximum v isp C v isn drop before the lt8697 limits the output current. connect directly to intv cc or float for a full scale v isp C v isn threshold of 48 mv or apply values between ground and 1 v to modulate the output current limit. there is an internal 2 a pull-up current on this pin. float or tie to intv cc when unused. gnd ( exposed pad pin 25): ground. the exposed pad must be connected to the negative terminal of the input capacitor and soldered to the pcb for proper operation and in order to lower the thermal resistance. downloaded from: http:///
lt 8697 11 8697fb for more information www.linear.com/lt8697 block diagram 2.2a 8697 bd +C en/uv shdn fb v c sys 1v erroramp 1v v in 5, 6 4 pg 19 tr/ss internal 1v ref ++ C 2 rt c ss r t 9% window comparator shdntsd intv cc uvlo v in uvlo shdntsd v in uvlo C+ C+ slope comp oscillator 300khz to 2.2mhz switch logic and anti- shoot through 3.4v reg m1m2 C+ + +C 20r 4m1m rr 1v 2a +C fb 3 sync 1 ictrl 24 rcbl r cbl 23 gnd 25 usb5v 20 isn 22 isp 21 bst 16 sys 18 intv cc 17 pgnd 7,8 sw 13,14,15 c bst c vcc c out r sense r cdc v out l c in v in r3 opt r4 opt load v load c cdc +C r cable /2 r cable /2 cable downloaded from: http:///
lt 8697 12 8697fb for more information www.linear.com/lt8697 operation the lt8697 is a monolithic, constant frequency, current mode step-down dc/dc converter. an oscillator, with frequency set using a resistor on the rt pin, turns on the internal top power switch at the beginning of each clock cycle. current in the inductor then increases until the top switch current comparator trips and turns off the switch. the peak inductor current is controlled by the voltage on the internal vc node. when the top power switch turns off, the synchronous power switch turns on until the next clock cycle begins or inductor current falls to zero. if overload conditions result in more than 4.2 a flowing through the bottom switch, the next clock cycle will be delayed until switch current returns to a safe level. to control the output voltage, the lt8697s error ampli - fier ser vos the vc node by comparing the voltage on the usb5v pin, divided down about 5:1, with an internal 0.97 v reference. when the load current increases, it causes a reduction in the feedback voltage relative to the reference. this differential error makes the error amplifier raise the vc voltage which raises the top switch peak current limit. the feedback process continues until the average induc- tor current matches the new load current and the output voltage is in regulation.to implement cable drop compensation, the lt8697 drives the rcbl pin to 20( v isp C v isn ). current sourced from the rcbl pin is derived from the usb5v pin, creating an output offset above the 5 v usb 5v pin voltage through r cdc that is proportional to the load current and the r cdc /r cbl resistor ratio. the output voltage therefore increases with increasing load current. this negative output impedance compensates for resistive drops in wiring for remote loads . the lt8697 error amp has two additional feedback paths that can override the usb5v pin control of the vc node. for output current limit, the voltage v isp C v isn across the output current sense resistor is not allowed to exceed the lower of 48 mv or v ictrl /20. also, the sys pin limits the output voltage to 5.8 v. when regulation is determined by either the output current limit or the sys pin, usb5v is not regulated to 5 v and the output voltage falls below its programmed value. if the en/uv pin is low, the lt8697 is shut down and draws 1 a from the input. when the en/uv pin is above 1v, the switching regulator will become active.the lt8697 operates in forced continuous mode ( fcm) for fast transient response and full frequency operation over a wide load range. if a clock is applied to the sync pin the part will synchronize to the external clock frequency and operate in fcm.to improve efficiency across all loads, supply current to internal circuitry is sourced from the sys pin when biased at 3.3 v or above. else, the internal circuitry will draw current from v in . when in fcm the oscillator operates continuously and positive sw transitions are aligned to the clock. negative inductor current is allowed. the lt8697 can sink current from the output and return this charge to the input in this mode, improving load step transient response. fcm is disabled if the v in pin is held above 29 v or if the sys pin is held above 7.5 v. when fcm is disabled in these ways, negative inductor current is not allowed and the lt8697 skips sw cycles in light load conditions. comparators monitoring the usb5v pin voltage will pull the pg pin low if the output voltage varies more than 9% ( typical) from the set point, or if a fault condition is present . the oscillator reduces the lt8697s operating frequency when the voltage at the sys pin is below 4 v . this frequency foldback helps to control the inductor current when the output voltage is lower than the programmed value during start-up or overcurrent conditions. downloaded from: http:///
lt 8697 13 8697fb for more information www.linear.com/lt8697 applications information cable drop compensation the lt8697 includes the necessary circuitry to implement cable drop compensation. cable drop compensation allows the regulator to maintain 5 v regulation on the usb v load despite high cable resistance. the lt8697 increases its local output voltage v out above 5 v as the load increases to keep v load regulated to 5 v. this compensation does not require running an additional pair of kelvin sense wires from the regulator to the load, but does require the system designer to know the cable resistance r cable as the lt8697 does not sense this value. program the cable drop compensation using the follow - ing ratio: r cbl = 20.55 ? r sense ? r cdc r cable where r cdc is a resistor tied between the regulator output and the usb5v pin, r cbl is a resistor tied between the rcbl pin and gnd, r sense is the sense resistor tied be- tween the isp and isn pins in series between the regulator output and the load, and r cable is the cable resistance. r sense is typically chosen based on the desired current limit and is typically 20 m for 2.1 a systems and 50 m for 0.9 a. see the setting the current limit section for more information. the current flowing into the usb5v pin through r cdc is identical to the current flowing out of the r cbl resistor. while the ratio of these two resistors should be chosen per the equation above, choose the absolute values of these resistors to keep this current between 30 a and 200 a at full load current. this restriction results in r cbl and r cdc values between 5 k and 33 k. if i usb5v is too low, capacitive loading on the usb5v and rcbl pins will degrade the load step transient performance of the regulator. if i usb5v is too high, the rcbl pin will go into current limit and the cable drop compensation feature will not work. capacitance across the remote load to ground downstream of r sense forms a zero in the lt8697s feedback loop due to cable drop compensation. c cdc reduces the cable drop compensation gain at high frequency. the 1 nf c cdc capacitor tied across the 10 k r cdc is required for stability of the lt8697s output. if r cdc is changed, c cdc should also be changed to maintain roughly the same 10 s rc time constant. if the capacitance across the remote load is large compared to the lt8697 output capacitor tied to the sys pin, a longer r cdc ? c cdc time constant may be necessary for stability depending on the amount of cable drop compensation used. output stability should always be verified in the end application circuit. the lt8697 limits the maximum voltage of v out by limiting the voltage on the sys pin v sys to 5.8 v. if the cable drop compensation is programmed to compensate for more than 0.8 v of cable drop at the maximum i load , this v sys maximum will prevent v out from rising higher and the voltage at the point of load will drop below 5 v. the following equation shows how to derive the lt8697 output voltage v out : v out = 5v + 20.55 ?i load ? r sense ? r cdc r cbl as stated earlier, the lt8697s cable drop compensation feature does not allow v out to exceed the sys regula- tion point of 5.8 v. if additional impedance is placed in between the sys pin and the out node such as r sense or a usb switch, the voltage drop through these imped- ances at the maximum i load must also be factored in to this maximum allowable v out value. refer to figure 1 for load lines of v out and v load to see how cable drop compensation works. figure 1. cable drop compensation load line load current (a) 0 4.8 voltage (v) 5.2 5.65.0 5.4 6.05.8 1 2 8697 f01 3 0.5 1.5 2.5 v load v out r cable = 0.3 r sense = 20m r cdc = 10k r cbl = 13.7k downloaded from: http:///
lt 8697 14 8697fb for more information www.linear.com/lt8697 applications information cable drop compensation over a wide temperature range cable drop compensation with zero temperature variation may be used in many applications. however, matching the cable drop compensation temperature variation to the cable resistance temperature variation may result in bet - ter overall output voltage accuracy over a wide operating temperature range. for example, in an application with 0.26 of wire resistance and a maximum output current of 2.1 a, cable drop compensation adds 0.55 v at 25 c to the output at max load for a fully compensated wire re - sistance. if the wire in this example is copper, the copper resistance temperature coefficient of about 4000 ppm/c results in an output voltage error of C130 mv at 85 c and 55mv at 0c. figure 2a shows this behavior. see table 1 for a list of copper wire resistances vs gauge. table 1. copper wire resistance vs wire gauge awg resistance of cu wire at 20c (m?/m) 15 10.4 16 13.2 17 16.6 18 21.0 19 26.4 20 33.3 21 42.0 22 53.0 23 66.8 24 84.2 25 106 26 134 27 169 28 213 29 268 30 339 31 427 32 538 33 679 34 856 35 1080 36 1360 37 1720 38 2160 39 2730 40 3440 cable drop compensation can be made to vary positively versus temperature with the addition of a negative tem- perature coefficient ( ntc) resistor as a part of the rcbl resistance. this circuit idea assumes the ntc resistor is at the same temperature as the cable. figure 2 b shows an example resistor network for r cbl that matches cop- per resistance variation over a wide C40 c to 125 c temperature range. figure 2 c shows the resultant cable drop compensation output at several temperatures using rcbl with negative temperature variation. figure 2b. r cbl resistor network for matching copper wire temperature coefficient figure 2a. cable drop compensation through 4m of awg 20 twisted-pair cable (260m) without temperature compensation temperature (c) C20 4.8 voltage (v) 5.0 5.2 5.4 5.6 5.8 v load v out 0 20 40 60 8697 f02a 80 100 i load = 2.1a cable = 4 meters awg20 twisted-pair copper 10k1% rcbl 8697 f02b 10k1% muratancp21xv103j03ra 10k thermistor downloaded from: http:///
lt 8697 15 8697fb for more information www.linear.com/lt8697 applications information table 2. copper wire inductors for use as sense resistors vendor part number dc resistance (m?) coilcraft na5931-al 15.7 5% coilcraft na5932-al 21.8 5% coilcraft na5933-al 32.4 5% coilcraft na5934-al 34.3 5% coilcraft na5935-al 44.1 5% coilcraft na5936-al 47.2 5% effect of cable inductance on load step transient response the inductance of long cabling limits the peak-to-peak transient performance of a 2- wire sense regulator to fast load steps. since a 2- wire sense regulator like the lt8697 detects the output voltage at its local output and not at the point of load, the load step response degradation due to cable inductance is present even with cable resistance compensation. the local regulator output capacitor and the input capacitor of the remote load form a lc tank circuit through the inductive cabling between them. fast load steps through long cabling show a large peak-to-peak transient response and ringing at the resonant frequency of the circuit. this ringing is a property of the lc tank circuit and does not indicate regulator instability. the ntc resistor does not give a perfectly linear transfer function versus temperature. here, for typical component values, the worse case error is <10% of the cable compen - sation output, or <1% of the total output voltage accuracy. better output voltage accuracy versus temperature can be achieved if r cbl resistor values are optimized for a nar- rower temperature range. contact lt c for help designing an r cbl resistor network. choosing an r sense resistor with a temperature coefficient that matches the cable resistance temperature coefficient can reduce this output voltage error overtemperature if the sense resistor is at roughly the same ambient temperature as r sense . small value copper wire inductors can be used in this way if the inductor resistance is well specified. figure 2 d shows the resultant cable drop compensation output at several temperatures using a copper r sense . use of an r sense that varies over temperature will make the lt8697 output current limit vary over temperature. to achieve the rated output current over the full operating tem - perature range, a higher room temperature output current limit may be necessary. table 2 shows the manufacturer specified dcr of several copper wire inductors that may be used for r sense . figure 2c. cable drop compensation through 4m of awg 20 twisted-pair cable (260m) with temperature compensation using ntc r cbl figure 2d. cable drop compensation through 4m of awg 20 twisted-pair cable (260m) with temperature compensation using copper r sense temperature (c) C20 4.8 voltage (v) 5.0 5.2 5.4 5.6 5.8 0 20 40 v load v out 60 8697 f02c 80 100 i load = 2.1a cable = 4 meters awg20 twisted-pair copper temperature (c) C20 4.8 voltage (v) 5.0 5.2 5.4 5.6 5.8 0 20 40 v load v out 60 8697 f02d 80 100 i load = 2.1a cable = 4 meters awg20 twisted-pair copper downloaded from: http:///
lt 8697 16 8697fb for more information www.linear.com/lt8697 applications information figure 3 shows the lt8697 load step transient response to a 50 ma/s , 0.5 a load step. tw o cable impedances are compared: resistive only and then resistive plus inductive. first, a surface mount 0.2 resistor is tied between the lt8697 output and the load step generator. this resistor stands in for a purely resistive cable. second, actual awg 20 twisted-pair cabling 3 meters long with 0.2 of total resistance and about 2.3 h of inductance is connected between the lt8697 output and the load step generator. even though the resistance in these two circuits is the same, the transient load step response in the cable is worse due to the inductance. the degree that cable inductance degrades lt8697 load transient response performance depends on the inductance of the cable and on the load step rate. long cables have higher inductance than short cables. cables with less separation between supply and return conductor pairs show lower inductance per unit length than those with separated conductors. faster load step rate exacerbates the effect of inductance on load step response. since the local ground at the lt8697 is separated by a current carrying cable from the remote ground at the point of load, the ground reference points for these two locations are different.use a differential probe across the remote output at the end of the cable to measure output voltage at that point. do not simultaneously tie an oscilloscopes probe ground leads to both the local lt8697 ground and the remote point of load ground. doing so will result in high current flow in the probe ground lines and a strange and incor - rect measurement . figure 4 shows this behavior. a 1 a/s, 0.5a load step is applied to the lt8697 output through 3 meters of awg 20 twisted-pair cable. on one curve, the resultant output voltage is measured correctly using a differential probe tied across the point of load. on the other curve, the oscilloscope ground lead is tied to the remote ground. this poor probing causes both a dc error due to the lower ground return resistance and an ac error showing increased overshoot and ringing. do not add your oscilloscope, lab bench, and input power supply ground lines into your measurement of the lt8697 remote output. figure 3. effect of cable inductance on load step transient response voltage (v) current (a) 5.00 5.25 5.50 8697 f03 4.75 4.50 4.25 3 4 5 2 1 0 100s/div v load through 0.2 i load 50ma/s v load through0.2 cable probing a remote output correctly take care when probing the lt8697s remote output to obtain correct results. the whole point of cable drop compensation is that the local regulator output has a different voltage than the remote output at the end of a cable due to the cable resistance and high load current. the same is true for the ground return line which also has resistance and carries the same current as the output. figure 4. effect of probing remote output incorrectly voltage (v) current (a) 5.0 5.3 5.6 8697 f04 4.7 4.4 4.1 3 4 5 2 1 0 100s/div v load incorrectly probed i load 1a/s v load correctly probed reducing output overshoot a consequence of the use of cable drop compensation is that the local output voltage at the lt8697 sys pin is regulated to a voltage that is higher than the remote out - put voltage at the point of load. several hundred m of cable resistance can separate these two outputs, so at 2 a of load current, the sys pin voltage may be significantly higher than the nominal 5 v output at the point of load. downloaded from: http:///
lt 8697 17 8697fb for more information www.linear.com/lt8697 applications information ensure that any components tied to the lt8697 output can withstand this increased voltage. the lt8697 has several features designed to mitigate any effects of higher output voltage due to cable drop compensation. first, the lt8697 error amplifier, in addi - tion to regulating the voltage on the usb5v pin to 5 v for the primary output, also regulates the sys pin voltage to less than 5.8 v. for v sys < 5.8 v, the usb5v feedback input runs the lt8697 control loop, and for v sys > 5.8 v, the sys feedback input runs the lt8697 control loop. this 5.8v upper limit on the maximum sys voltage protects components tied to the lt8697 output, such as a usb device or a usb switch, from an overvoltage condition, but limits the possible amount of cable drop compensa - tion to 0.8v. additionally, the lt8697 can sink current from the output and return the charge to the input when in forced continu - ous mode ( fcm). this feature improves the step response for a load step from high to low. cable drop compensa- tion adds voltage to the output to compensate for voltage drop across the line resistance at high load. since most dc/dc convertors can only source current, a load step from high to near zero current leaves the output voltage high and out of regulation. the lt8697 fixes this problem by allowing the regulator to sink current from the output when usb5v is too high using fcm. figure 5 shows the output voltage of the front page application circuit with and without fcm. figure 5. load step response with and without forced continuous mode the load step response from high current to zero without the fcm is extremely slow and is limited by the sys pin bias current. however, with fcm enabled, the output slews quickly back into regulation. if v in is above 29 v or v sys is above 7.5v, fcm is disabled.interfacing with a usb switch a usb or similar electronic switch can be tied between the lt8697 output and the point of load. the switch on resistance can be included in the cable drop compensation calculation. alternately, to improve load regulation, tie the usb5v feedback input through r cdc to the output of the usb switch so the usb switch impedance is removed from the dc load response. tie the output to the usb switch input. the sys pin regulates to a maximum of 5.8 v, so the usb switch should be chosen accordingly. the lt8697 has output current limit. many usb switches implement current limit as well. for well controlled and predicable behavior, ensure that only one chip sets the output current limit, and the other chip has current limit that exceeds the desired current limit over all operating conditions. the lt8697 has many of the features of usb switches: programmable output current limit, filtered fault report - ing and on/off functionality. in addition, unlike many usb switches, the lt8697 output can survive shorts to 30v, enhancing system robustness. therefore, in many cases a usb switch is not necessary and the lt8697 can provide both the functionality of a voltage regulator and a usb switch.using sys as a secondary output for some applications, the sys pin can be used as a sec - ondary voltage output in addition to the primary voltage output regulated by the usb5v pin. the sys pin voltage varies between 5 v and 5.8 v depending on the load cur - rent if cable drop compensation is used on the primary output. a 3.3 v low dropout regulator can be tied to sys to provide a secondary regulated output such as to power a usb controller. the sys output will not have cable drop compensation, but will rise above 5 v depending on the usb output load current. the load on the sys pin should voltage (v) current (a) 5.00 5.25 5.50 8697 f05 4.75 4.50 4.25 4 6 8 2 0 C2 400s/div v load without fcm v load with fcm i load 25ma/s downloaded from: http:///
lt 8697 18 8697fb for more information www.linear.com/lt8697 applications information be designed to limit load current. also, an electronic switch may be necessary to prevent an output overcurrent condi- tion on the usb5v output from bringing down the sys output. see the inductor selection and maximum output current discussion below to determine how much total load current can be drawn from the outputs for a given lt8697 application.setting the current limit in addition to regulating the output voltage, the lt8697 includes a current regulation loop for setting the average output current limit. the lt8697 measures the voltage drop across an external current sense resistor r sense using the isp and isn pins. this resistor should be connected in series with the load current after the output capacitor. the current loop modulates the cycle-by-cycle top switch switch current limit such that the average voltage across the ispCisn pins does not exceed its regulation point. the lt8697 current limit can be programmed by forcing a voltage on the ictrl pin between 0 v and 1 v. program the current limit using the following equation: i lim = v ctrl r sense ? 20.3 the preceding i lim equation is valid for v isp C v isn < 48mv. at 48 mv v sense , the internal current limit loop takes over output current regulation from the ictrl pin. the maximum programmable output current ( i lim(max) ) is therefore found by the following equation: i lim(max) = 48mv r sense the internal 2 a pull-up on the ictrl pin allows this pin to be floated if unused, in which case the i lim(max) would be the output current limit. when in forced continuous mode, the lt8697s ability to regulate the output current is limited by its t on(min) . in this scenario, at very low output voltage the output current can exceed the programmed output current limit and is limited by the bottom switch current limit of 4.5 a plus 1/2 the ripple current. to help mitigate this effect, at low output voltage the lt8697 folds back the switching frequency by 10:1 to allow regulation at very low duty cycle. also, above v in = 29 v the lt8697 disables forced continuous mode so the part can pulse skip to maintain regulation at any low v out to v in ratio. for v in < 29 v, use the following equation to find the minimum output voltage ( v out(min) ) where the lt8697 can regulate the output current limit: v out(min) = 0.1 ? f sw ? t on(min) ? ( v in C v sw(top) + v sw(bot) ) C v sw(bot) C v sense C v l where f sw is the switching frequency, t on(min) is the minimum on-time, v sw(top) and v sw(bot) are the in- ternal switch drops (~0.3 v and ~0.15 v) respectively at maximum load), v sense is voltage across the r sense at the programmed output current and v l is the resistive drop across the inductor esr at the programmed output current. if the calculated v out(min) is negative or is less than the ir drop across the resistive short on the output at the programmed current limit, then the lt8697 can regulate the output current limit. in practical applications, the resistances of the cable, inductor and sense resistor are more than adequate to allow the lt8697 to regulate to the output current limit for any switching frequency and input voltage. for a 400 khz application in a worst-case condition, the programmed output current can be regulated into v out = 0 v for any input voltage up to 42 v. for a 2 mhz application in a worst- case condition, the programmed output current can be regulated into v out = 0.3 v or higher. refer to figure 6 to see how the front page application circuit responds to a short directly on the regulator output without a cable. i out (a) 1 v out (v) 0.4 0.6 3 8697 f06 0.2 0 1.5 2 2.5 1.00.8 v ctrl = open, v in = 27v v ctrl = 0.5v, v in = 16v v ctrl = open, v in = 16v v ctrl = 0.5v, v in = 27v figure 6. output current regulation vs v out at f sw = 2mhz, r sense = 18m downloaded from: http:///
lt 8697 19 8697fb for more information www.linear.com/lt8697 applications information using rcbl as an output current monitor the primary function of the rcbl pin is to set the cable drop compensation as discussed in the cable drop com - pensation section earlier. however, the rcbl pin produces an output voltage that is proportional to the output load current. the rcbl pin can therefore be used as an output load monitor. the voltage on the rcbl pin obeys the fol - lowing relation to usb load current: v cbl = i load ? r sense ? 20.55 v cbl is valid when the lt8697 is switching. since the rcbl pin current is part of the cable drop com- pensation control loop, excessive capacitive loading on the rcbl pin can cause usb output voltage overshoot during load steps. keep the capacitive loading on the rcbl pin below 100 pf or isolate the load capacitance with 100 k in series between the rcbl pin and the input it is driving, as shown in figure 7. table 3. sw frequency vs r t value f sw (mhz) r t (k) 0.3 140 0.4 102 0.5 80.6 0.6 66.5 0.7 56.2 0.8 47.5 1.0 37.4 1.2 30.1 1.4 25.5 1.6 21.5 1.8 18.7 2.0 16.5 2.2 14.7 operating frequency selection and trade-offs selection of the operating frequency is a trade-off between efficiency, component size, and input voltage range. the advantage of high frequency operation is that smaller inductor and capacitor values may be used. the disad - vantages are lower efficiency and a reduced input voltage range with constant frequency operation.the highest switching frequency ( f sw(max )) for a given application can be calculated as follows: f sw(max) = 5v + v sw(bot) t on(min) ? v in ? v sw(top) + v sw(bot) ( ) where v in is the typical input voltage, v sw(top) and v sw(bot) are the internal switch drops (~0.3 v and ~0.15 v respectively, at maximum load) and t on(min) is the mini- mum top switch on-time ( see the electrical characteristics section). this equation shows that a slower switching frequency is necessary to accommodate a high v in /v out ratio. for transient operation, v in may go as high as the abso- lute maximum rating of 42 v regardless of the r t value. however, the lt8697 will reduce switching frequency as necessary to maintain control of inductor current to as - sure safe operation. figure 7. using the rcbl pin as output current monitor 100k adc 8697 f07 r cbl rcbl setting the switching frequency the lt8697 uses a constant frequency pwm architecture that can be programmed to switch from 300 khz to 2.2 mhz by using a resistor tied from the rt pin to ground. a table showing the necessary r t value for a desired switching frequency is in table 3. the r t resistor required for a desired switching frequency can be calculated using the following equation: r t = 43 f sw ? 5.2 where r t is in k and f sw is the desired switching fre- quency in mhz. downloaded from: http:///
lt 8697 20 8697fb for more information www.linear.com/lt8697 applications information the lt8697 can operate at very high duty cycle, thus maintaining the output voltage in regulation with the input voltage only several hundred mv higher. this dropout volt - age depends on load current and the r ds(on) of the top switch. however, the lt8697 skips off-times in very high duty cycle conditions, reducing the switching frequency below that programmed by r t . in this dropout mode, the maximum allowable on-time is about 18 s. if this 18 s on - time threshold is reached, the lt8697 enforces a 400 ns off-time to keep the bst capacitor charged at light loads. this behavior limits the maximum duty cycle to 97.5%, but guarantees good dropout performance across all loads and any start-up condition. for applications that cannot allow deviation from the pro - grammed switching frequency at low v in / v out ratios, use the following formula to set switching frequency: f sw(max) = 1 t off(min) v in(min) ? 5.8 ? v sw(top) v in(min) + v sw(bot) ? v sw(top) ?? ? ?? ? where v in(min) is the minimum input voltage without skipped cycles, v sw(top) and v sw(bot) are the internal switch drops (~0.3 v , ~0.15 v, respectively at maximum load), f sw is the switching frequency ( set by r t ), and t off(min) is the minimum switch off-time. note that higher switching frequency will increase the minimum input voltage below which cycles will be dropped to achieve higher duty cycle.inductor selection and maximum output current the lt8697 is designed to minimize solution size by allowing the inductor to be chosen based on the output load requirements of the application. during overload or short-circuit conditions the lt8697 safely tolerates opera - tion with a saturated inductor through the use of a high speed peak-current mode architecture. a good first choice for the inductor value is as follows: l = 5.8v + v sw(bot) f sw where f sw is the switching frequency in mhz, v sw(bot) is the bottom switch drop (~0.15 v) and l is the inductor value in h. to avoid overheating and poor efficiency, an inductor must be chosen with an rms current rating that is greater than the maximum expected output load of the application. in addition, the saturation current ( typically labeled i sat ) rat- ing of the inductor must be higher than the load current plus 1/2 of the inductor ripple current: i l(peak) = i out(max) + ? i l 2 where i l is the inductor ripple current as calculated below and i out(max) is the maximum output load for a given application. as a quick example, an application requiring 1 a output should use an inductor with an rms rating of greater than 1a and an i sat of greater than 1.3 a. during long duration overload or short-circuit conditions, the inductor rms current rating requirement is greater to avoid overheat - ing of the inductor. to keep the efficiency high, the series resistance ( dcr) should be less than 0.04, and the core material should be intended for high frequency applications . the lt8697 limits the peak switch current in order to protect the switches and the system from overload faults. the top switch current limit ( i lim ) is 4.8 a at low duty cycles and decreases linearly to 4 a at dc = 0.8. the inductor value must then be sufficient to supply the desired maximum output current ( i out ( max ) ), which is a function of the switch current limit (i lim ) and the ripple current. i out(max) = i lim ? ? i l 2 the peak-to-peak ripple current in the inductor can be calculated as follows: ? i l = 5v l ? f sw ? 1 ? 5v v in(max) ? ? ?? ? ? ?? where f sw is the switching frequency of the lt8697 and l is the value of the inductor. therefore, the maximum output current that the lt8697 will deliver depends on the switch current limit, the inductor value, and the input and output voltages. the inductor value may have to be increased if the inductor ripple current does not allow sufficient maximum output current ( i out(max) ) given the downloaded from: http:///
lt 8697 21 8697fb for more information www.linear.com/lt8697 applications information switching frequency and maximum input voltage used in the desired application. note that the lt8697 peak switch current decreases in the 125 c to 150 c h-grade junction temperature range. the maximum output current that the lt8697 can deliver at 150 c junction temperature and maximum duty cycle may be less than 2.5 a depending on the inductor value. the optimum inductor for a given application may differ from the one indicated by this design guide. a larger value inductor provides a higher maximum load current and reduces the output voltage ripple. for applications requir - ing smaller load currents, the value of the inductor may be lower and the lt8697 may operate with higher ripple current. this allows use of a physically smaller inductor, or one with a lower dcr resulting in higher efficiency. for more information about maximum output current and discontinuous operation, see linear technologys application note 44. finally, for duty cycles greater than 50% ( v out /v in > 0.5), a minimum inductance l min is required to avoid sub-harmonic oscillation: l min = 5.8v + v sw(bot) f sw ? 0.8 for robust operation over a wide v in and v out range, use at least an inductor value as specified above.input capacitor bypass the input of the lt8697 circuit with a ceramic ca - pacitor of x7r or x5r type placed as close as possible to the v in and pgnd pins. y5v types have poor performance over temperature and applied voltage, and should not be used. a 4.7 f to 10 f ceramic capacitor is adequate to bypass the lt8697 and will easily handle the ripple current . note that larger input capacitance is required when a lower switching frequency is used. if the input power source has high impedance, or there is significant inductance due to long wires or cables, additional bulk capacitance may be necessary. this can be provided with a low performance electrolytic capacitor. step-down regulators draw current from the input sup - ply in pulses with very fast rise and fall times. the input capacitor is required to reduce the resulting voltage ripple at the lt8697 and to force this very high frequency switching current into a tight local loop, minimizing emi. a 4.7 f capacitor is capable of this task, but only if it is placed close to the lt8697 ( see the pcb layout section). a second precaution regarding the ceramic input capacitor concerns the maximum input voltage rating of the lt86 97. a ceramic input capacitor combined with trace or cable inductance forms a high quality ( under damped) tank cir - cuit. if the lt8697 circuit is plugged into a live supply, the input voltage can ring to twice its nominal value, possibly exceeding the lt8697s voltage rating. this situation is easily avoided ( see linear technology application note 88). output capacitor and output ripple the output capacitor has two essential functions. along with the inductor, it filters the square wave generated by the lt8697 to produce the dc output. in this role it determines the output ripple, thus low impedance at the switching frequency is important. the second function is to store energy in order to satisfy transient loads and stabilize the lt8697s control loop. ceramic capacitors have very low equivalent series resistance ( esr) and provide the best ripple performance. for good starting values, see the typical applications section. use x5r or x7r types. this choice will provide low output ripple and good transient response. increasing the output capacitance will also decrease the output voltage ripple. a lower value of output capacitor can be used to save space and cost but this may cause loop instability if the output capacitor is too small. since cable drop compensation slews the voltage across the output capacitor in response to transient load steps, a smaller output capacitor can give faster response time. see the typical applications in this data sheet for suggested capacitor values. when choosing a capacitor, special attention should be given to the data sheet to calculate the effective capacitance under the relevant operating conditions of voltage bias and temperature. a physically larger capacitor or one with a higher voltage rating may be required. downloaded from: http:///
lt 8697 22 8697fb for more information www.linear.com/lt8697 applications information enable pin the lt8697 is in shutdown when the en/uv pin is low and active when the pin is high. the rising threshold of the en comparator is 1.0 v, with 40 mv of hysteresis. the en/uv pin can be tied to v in if the shutdown feature is not used, or tied to a logic level if shutdown control is required. adding a resistor divider from v in to en/uv programs the lt8697 to regulate the output only when v in is above a desired voltage ( see the block diagram). typically, this threshold, v in(en) , is used in situations where the input supply is current limited, or has a relatively high source resistance. a switching regulator draws constant power from the source, so source current increases as source voltage drops. this looks like a negative resistance load to the source and can cause the source to current limit or latch low under low source voltage conditions. the v in(en) threshold prevents the regulator from operating at source voltages where the problems might occur. this threshold can be adjusted by setting the values r3 and r4 such that they satisfy the following equation: v in(en) = r3 r4 + 1 ?? ? ?? ? ? 1.0v where the lt8697 will remain off until v in is above v in(en) . due to the comparators hysteresis, switching will not stop until the input falls slightly below v in(en) . intv cc regulator an internal low dropout ( ldo) regulator produces the 3.4 v supply from v in that powers the drivers and the internal bias circuitry. the intv cc can supply enough current for the lt8697s circuitry and must be bypassed to ground with a minimum capacitance of 1 f. use an x5r or an x7r ceramic capacitor. good bypassing is necessary to supply the high transient currents required by the power mosfet gate drivers. to improve efficiency the internal ldo can also draw current from the sys pin when the sys pin is at 3.3 v or higher. sys must be tied to the lt8697 output capacitor. if the sys pin is below 3.3 v, the internal ldo will consume current from v in . do not load intv cc with more than 100a. output voltage tracking and soft-start the lt8697 allows the user to program its output voltage ramp rate by means of the tr/ss pin. an internal 2.2 a source pulls up the tr / ss pin to intv cc . putting an external capacitor on tr/ss enables soft starting the output to pre- vent a current surge on the input supply. during the soft - start ramp the output voltage will proportionally track the tr / ss pin voltage . for output tracking applications, tr/ss can be externally driven by another voltage source. from 0 v to 0.97v, the tr/ss voltage will override the internal 0.97 v reference input to the error amplifier, thus regulating the usb5v pin voltage to 5 that of tr/ss pin. when tr/ss is above 0.97 v , tracking is disabled and usb 5v will regulate to 5 v. the tr/ss pin may be left floating if the function is not needed. an active pull-down circuit is connected to the tr/ss pin which will discharge the external soft-start capacitor in the case of fault conditions and restart the ramp when the faults are cleared. fault conditions that clear the soft-start capacitor are the en/uv pin transitioning low, v in voltage falling too low or thermal shutdown.output power good when the lt8697s output voltage is within the 9% window of the regulation point, which is v usb5v in the range of 4.55 v to 5.45 v ( typical), the output voltage is considered good and the open-drain pg pin goes high impedance and is typically pulled high with an external resistor. otherwise, the internal pull-down device will pull the pg pin low. to prevent glitching, both the upper and lower thresholds include 1.3% of hysteresis. the pg pin is also actively pulled low during several fault conditions: en/uv pin is below 1 v, intv cc has fallen too low, v in is too low, or thermal shutdown. synchronizationto synchronize the lt8697 oscillator to an external fre - quency, connect a square wave ( with 20% to 80% duty cycle) to the sync pin. the square wave amplitude should have valleys that are below 0.4 v and peaks above 2.4 v (up to 6v). downloaded from: http:///
lt 8697 23 8697fb for more information www.linear.com/lt8697 applications information the lt8697 may be synchronized over a 300 khz to 2.2 mhz range. the r t resistor should be chosen to set the lt8697 switching frequency equal to or below the lowest synchro- nization input . for example, if the synchronization signal will be 500 khz and higher, the r t should be selected for 500khz. the slope compensation is set by the rt value, while the minimum slope compensation required to avoid subharmonic oscillations is established by the inductor size, input voltage, and output voltage. since the syn - chronization frequency will not change the slopes of the inductor current waveform, if the inductor is large enough to avoid subharmonic oscillations at the frequency set by rt , then the slope compensation will be sufficient for all synchronization frequencies.output short protection the lt8697 will tolerate a shorted output. several features are used for protection during output short-circuit and brownout conditions. the first is the switching frequency will be folded back while the output is lower than the set point to maintain inductor current control. second, the bottom switch current is monitored such that if inductor current is beyond safe levels, switching of the top switch will be delayed until the inductor current falls to safe levels. the lt8697 withstands a short between its output and 12 v or 24 v automotive battery voltage. the usb5v pin draws current when held above 9 v . a minimum 10 k r cdc resistor must be tied from usb5v to v out for robust operation with v out above its regulation point. the remaining pins sw, isp, isn, pg and sys tied at or near the output voltage have at least a 30 v maximum rating. the output capacitor c out absorbs esd events on the lt8697 output. if v in is held low or floated while v out is held high, the body diode of the lt8697 internal top power switch will conduct high current from the sw pin to the v in pin, regardless of the state of the en/uv pin, causing damage to the lt8697. v out must remain equal to or lower than v in to avoid this damage to the lt8697. figure 8. recommended pcb layout for the lt8697 downloaded from: http:///
lt 8697 24 8697fb for more information www.linear.com/lt8697 pcb layout for proper operation and minimum emi, care must be taken during printed circuit board layout. figure 8 shows the recommended component placement with trace , ground plane and via locations. note that large, switched currents flow in the lt8697s v in pins, pgnd pins, and the input capacitors ( c in1 and c in2 ). the loop formed by the input capacitor should be as small as possible by placing the capacitor adjacent to the v in and pgnd pins. when using a physically large input capacitor the resulting loop may become too large in which case using a small case/ value capacitor placed close to the v in and pgnd pins plus a larger capacitor further away is preferred. these components, along with the inductor and output capacitor , should be placed on the same side of the circuit board, and their connections should be made on that layer. place a local ground plane under the application circuit on the layer closest to the surface layer. the sw and bst nodes should be as small as possible. finally, keep the usb5v and rt nodes small so that the ground traces will shield them from the sw and bst nodes. the exposed pad on the bottom of the package must be soldered to ground so that the pad is connected to ground electrically and also applications information acts as a heat sink thermally. to keep thermal resistance low, extend the ground plane as much as possible, and add thermal vias under and near the lt8697 to additional ground planes within the circuit board and on the bottom side. high temperature considerations for applications with higher ambient temperatures, lay out the pcb to ensure good heat sinking of the lt8697. the exposed pad on the bottom of the package must be soldered to a ground plane. this ground should be tied to large copper layers below with thermal vias; these layers will spread heat dissipated by the lt8697. placing additional vias can reduce thermal resistance further. the maximum load current should be derated as the ambient temperature approaches the maximum junction rating. power dissipation within the lt8697 can be estimated by calculating the total power loss from an efficiency measurement and subtracting the inductor loss. the die temperature is calculated by multiplying the lt8697 power dissipation by the thermal resistance from junction to ambient. the lt8697 will stop switching and indicate a fault condition if safe junction temperature is exceeded. downloaded from: http:///
lt 8697 25 8697fb for more information www.linear.com/lt8697 typical applications 5v step-down converter with cable drop compensation for copper cabling over wide temperature range temperature correction for cable drop compensation through copper cabling en/uvpg intv cc ictrlsync tr/ss rt sw sys isp isn usb5v rcbl v in v in bst l 10h r sense 0.02? gnd lt8697 c vcc 1f c ss 10nf f sw = 700khz for v in = 7v to 27v r t 56.2k pgnd c in 10f c bst 0.1f c out 100f c cdc 1nf r cbl2 10k r ntc 10k r cbl1 10k 0.13? 4 meters awg20 twisted pair cable 0.13? r cdc 10k v out load 8697 ta02 v load 5v2.1a +C c in : x7r or x5r c out : 1210 case size, x7r or x5r c vcc : x7r or x5r c bst : x7r or x5r l: wrth 74437368100 r ntc : murata ncp21xv103j03ra v in(max) = 42v v in(min) = 5.8v at 1a i load 6.6v at 2.1a i load temperature (c) C50 voltage (v) 5.2 5.4 150 8697 ta02b 5.04.8 0 50 100 5.8 v load v out 5.6 i load = 2.1a cable = 4 meters awg20 twisted-pair copper downloaded from: http:///
lt 8697 26 8697fb for more information www.linear.com/lt8697 typical applications 2mhz 5v step-down converter with cable drop compensation en/uvpg intv cc ictrlsync tr/ss rt sw sys isp isn usb5v rcbl v in v in bst l 3.3h r sense 0.018? gnd lt8697 c vcc 1f r t 16.5k pgnd c ss 10nf f sw = 2mhz for v in = 8v to 27v c bst : x7r or x5r c in : x7r or x5r c out : 1210 case size, x7r or x5r c vcc : x7r or x5r l: coilcraft xal7070-332 v in(max) = 42v v in(min) = 5.7v at 1a i load 6.3v at 2.4a i load c in 4.7f c bst 0.1f c out 47f 2 r cbl 18.2k 0.1? 3 meters awg 20 twisted pair cable 0.1? r cdc 10k c cdc 1nf v out load 8697 ta03a v load 5v2.4a +C voltage (v) current (a) 5.00 5.25 5.50 8697 ta03b 4.75 4.50 4.25 3 4 5 2 1 0 100s/div v out v load i load 50ma/s transient response through 3 meters awg 20 twisted-pair cable 2mhz 5.1v step-down converter with cable drop compensation and output current monitor en/uvpg intv cc ictrlsync tr/ss rt sw sys isp isn usb5v rcbl v in v in bst l 3.3h r sense 0.02? gnd lt8697 c vcc 1f c ss 10nf r t 16.5k pgnd c in 4.7f c bst 0.1f c out 47f 2 c cdc 1nf r cbl 15.4k v mon 0.41v/a 0.13? 4 meters awg20 twisted pair cable 0.13? r 5v1 500k r cdc 10k v out load 8697 ta04a v load 5.1v2.1a +C 100k c bst : x7r or x5r c in : x7r or x5r c out : 1210 case size, x7r or x5r c vcc : x7r or x5r l1: sumida cdrr105np-3r3ncv in(max) = 42v v in(min) = 5.8v at 1a i load 6.5v at 2.1i load f sw = 2mhz for v in = 8v to 27v transient response 0.5a to 1.5a load step voltage (v) current (a) 4.75 5.00 5.25 v load 8697 ta04b 1.00 0.50 0 2 10 400s/div v mon 0.41v/a i load 10ma/s downloaded from: http:///
lt 8697 27 8697fb for more information www.linear.com/lt8697 typical applications 2.2mhz, 5.05v step-down converter with negative output resistance output voltage vs load current en/uvpg intv cc ictrlsync tr/ss rt sw sys isp isn usb5v rcbl v in v in bst l 2.7h r sense 0.018? gnd lt8697 c vcc 1f r t 14.7k pgnd c ss 10nf f sw = 2.2mhz for v in = 8v to 27v c bst : x7r or x5r c in : x7r or x5r c out : 1210 case size, x7r or x5r c vcc : x7r or x5r l: coilcraft xal7030-272 v in(max) = 42v v in(min) = 5.8v at 1a i load 6.5v at 2.4a i load c in 4.7f c bst 0.1f c out 47f 2 r cbl 15.4k 0.1? v out 3 meters awg 20 twisted pair cable 0.1? r cdc2 9.09k r cdc1 1k c cdc 1nf r 5vo5 100k load 8697 ta07a v load 5.05v2.4a +C i load (a) 0 5.0 voltage (v) 5.2 5.4 5.6 5.8 0.5 1.0 1.5 2.0 8697 ta07b 2.5 3.0 v out v load downloaded from: http:///
lt 8697 28 8697fb for more information www.linear.com/lt8697 package description please refer to http:// www .linear.com/designtools/packaging/ for the most recent package drawings. 3.00 0.10 1.50 ref 5.00 0.10 note:1. drawing is not a jedec package outline 2. drawing not to scale 3. all dimensions are in millimeters 4. dimensions of exposed pad on bottom of package do not include mold flash. mold flash, if present, shall not exceed 0.15mm on any side 5. exposed pad shall be solder plated 6. shaded area is only a reference for pin 1 location on the top and bottom of package pin 1 top mark (note 6) 0.40 0.10 23 24 12 bottom viewexposed pad 3.50 ref 0.75 0.05 r = 0.115 typ pin 1 notchr = 0.20 or 0.25 45 chamfer 0.25 0.05 0.50 bsc 0.200 ref 0.00 C 0.05 (udd24) qfn 0808 rev ? recommended solder pad pitch and dimensions apply solder mask to areas that are not soldered 0.70 0.05 0.25 0.05 3.50 ref 4.10 0.055.50 0.05 1.50 ref 2.10 0.05 3.50 0.05 package outline r = 0.05 typ 1.65 0.10 3.65 0.10 1.65 0.05 udd package 24-lead plastic qfn (3mm 5mm) (reference ltc dwg # 05-08-1833 rev ?) 3.65 0.05 0.50 bsc downloaded from: http:///
lt 8697 29 8697fb for more information www.linear.com/lt8697 information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. revision history rev date description page number a 04/15 added h-grade in absolute maximum ratings and order information. clarified electrical specifications.added h-grade in note 2. updated v usb5v vs temperature graph. updated v en vs temperature, top fet current limit vs duty cycle and top fet current limit vs temperature graphs. clarified applications information.added lt4180 to related parts list. 23 4 4 5 2028 b 06/15 added storage temperature range. clarified sync pin current specifications. 23 downloaded from: http:///
lt 8697 30 8697fb for more information www.linear.com/lt8697 ? linear technology corporation 2013 lt 0615 rev b ? printed in usa linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax : (408) 434-0507 www.linear.com/lt8697 related parts typical application high efficiency 5.2v step-down converter with programmable output current limit and sync en/uvictrl intv cc pgsync tr/ss rt f sw = 300khz to 500khz for v in = 6.5v to 27v sw sys isp isn usb5v rcbl v in v in 6v to 42v current limit 2.67a/v for v ctrl = 0.2v to 1v bst l 22h r sense 0.018? gnd lt8697 c vcc 1f 300khz to 500khz c ss 10nf r t 140k 100k pgnd c in 10f c bst 0.1f c out 100f 249k 8697 ta06 v out 5.2v0.5a to 2.4a c in : x7r or x5r c out : 1210 case size, x7r or x5r c vcc : x7r or x5r c bst : x7r or x5r l: sumida crh15d78/anp-220mc r cdc 10k part number description comments lt8610 42v, 2.5a, 96% efficiency, 2.2mhz synchronous micropower step-down dc/dc converter with i q = 2.5a v in(min) = 3.4v, v in(max) = 42v, v out(min) = 0.985v, i q = 2.5a, i sd <1a, msop-16e package lt8611 42v, 2.5a, 96% efficiency, 2.2mhz synchronous micropower step-down dc/dc converter with i q = 2.5a and input/output current limit/monitor v in(min) = 3.4v, v in(max) = 42v, v out(min) = 0.985v, i q = 2.5a, i sd <1a, 3mm 5mm qfn-24 lt3690 36v with 60v transient protection, 4a, 92% efficiency, 1.5mhz synchronous micropower step-down dc/dc converter with i q = 70a v in(min) = 3.9v, v in(max) = 36v, v out(min) = 0.985v, i q = 70a, i sd <1a, 4mm 6mm qfn-26 lt3971a-5 38v, 1.2a, 2.2mhz high efficiency micropower step-down dc/dc converter with i q = 2.8a v in(min) = 4.2v, v in(min) = 40v, v out = 5v, i q = 2.8a, i sd <1a, msop-10e lt6110 cable/wire drop compensator v in(min) = 2v, v in(max) = 50v, v out(min) = 0.4v, i q = 16a, sot-8, 2mm 2mm dfn-8 lt3991 55v, 1.2a, 2.2mhz high efficiency micropower step-down dc/dc converter with i q = 2.8a v in(min) = 4.2v, v in(max) = 62v, v out(min) = 1.21v, i q = 2.8a, i sd <1a, 3mm 3mm dfn-10, msop-10e lt3970 40v, 350ma, 2.2mhz high efficiency micropower step-down dc/dc converter with i q = 2.5a v in(min) = 4.2v, v in(max) = 40v, v out(min) = 1.21v, i q = 2.5a, i sd <1a, 3mm 2mm dfn-10, msop-10 lt3990 62v, 350ma, 2.2mhz high efficiency micropower step-down dc/dc converter with i q = 2.5a v in(min) = 4.2v, v in(max) = 62v, v out(min) = 1.21v, i q = 2.5a, i sd <1a, 3mm 2mm dfn-10, msop-10 lt3480 36v with transient protection to 60v, 2a (i out ), 2.4mhz, high efficiency step-down dc/dc converter with burst mode ? operation v in(min) = 3.6v, v in(max) = 36v, transient to 60v, v out(min) = 0.78v, i q = 70a, i sd <1a, 3mm 3mm dfn-10, msop-10e lt3980 58v with transient protection to 80v, 2a (i out ), 2.4mhz, high efficiency step-down dc/dc converter with burst mode operation v in(min) = 3.6v, v in(max) = 58v, transient to 80v, v out(min) = 0.78v, i q = 85a, i sd <1a, 3mm 4mm dfn-16, msop-16e lt4180 virtual remote sense controller v in(min) = 3.1v, v in(max) = 50v, transient to 80v, i q = 1ma, ssop-24 load current (a) 0 efficiency (%) 80 90 100 2.0 8697 ta06b 7060 75 85 9565 55 50 0.5 1.0 1.5 2.5 v in = 8v v in = 12v v in = 24v f sw = 300khz r sense = 18m dcr l = 20m r cbl = open v out = 5.2v l = 22h sumida efficiency vs load downloaded from: http:///

▲Up To Search▲

Price & Availability of LT8697IUDDTRPBF

	To Download LT8697IUDDTRPBF Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .